DDR SDRAM

          When we introduced our DDR SDRAM, it was revolutionary and pioneering technology. DDR allows applications to transfer data on both the rising and falling edges of a clock signal, doubling bandwidth and vastly improving performance over SDR SDRAM. To achieve this functionality, we use a 2n-prefetch architecture where the internal data bus is double the size of the external data bus, so data capture can happen two times each clock cycle.

          Density

          Select Density
          • 256Mb
          • 512Mb
          • 1Gb
          Range: 256Mb - 1Gb
          • Width
            x8, x16
          • Voltage
            2.5V, 2.6V
          • Package
            FBGA, TSOP
          • Clock Rate
            167 MHz, 200 MHz
          • Op. Temp.
            0C to +70C, -40C to +85C
          • Width
            x4, x8, x16
          • Voltage
            2.5V, 2.6V
          • Package
            FBGA, TSOP
          • Clock Rate
            167 MHz, 200 MHz
          • Op. Temp.
            0C to +70C, -40C to +85C,-40C to +105C
          • Width
            x16
          • Voltage
            2.5V
          • Package
            TSOP
          • Clock Rate
            167 MHz
          • Op. Temp.
            -40C to +85C
          +
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